kayal.pdf

CMOS ANALOG DESIGN EDUCATIONAL
TOOL
M. Kayal, D. Stefanovic, M. Pastre
Swiss Federal Institute of Technology, Electronic Labs, STI/IMM/LEG,
Lausanne, Switzerland
CMOS ANALOG DESIGN EDUCATIONAL TOOL
M. Kayal, D. Stefanovic M. Pastre
Procedural Analog Design Tool
• Dedicated to teaching the design procedure of analog circuits
• Interactive Windows based tool
• Allows:
• step-by-step design of analog cells
• layout generation for matched substructures
• design of OTAs and different
operational amplifiers topologies
• Result: an optimized design methodology ready for simulation
CMOS ANALOG DESIGN EDUCATIONAL TOOL
M. Kayal, D. Stefanovic M. Pastre
Top down system design approach
Behavioral modeling
and simulation
Digital
Analog
Behavioral simulation
and synthesis
PAD tool
Specs of basic blocks
Circuit schematic
Transistor sizing
Layout generation, extraction
and post layout simulation
Layout generation, extraction
and post layout simulation
Assembling
CMOS ANALOG DESIGN EDUCATIONAL TOOL
M. Kayal, D. Stefanovic M. Pastre
PAD structure
transistor-level
calculator
basic analog
structures
library
procedural design
of complex analog structures
Interactive interface
Instantaneous visualization
CMOS ANALOG DESIGN EDUCATIONAL TOOL
M. Kayal, D. Stefanovic M. Pastre
Transistor modeling
EKV MOS model
• links weak and strong inversion in a continuous way
• solutions for different input parameter sets
without using complex numerical methods
• large number of transistor parameters
important for analog design can be extracted
CMOS ANALOG DESIGN EDUCATIONAL TOOL
M. Kayal, D. Stefanovic M. Pastre
The charts !
CMOS ANALOG DESIGN EDUCATIONAL TOOL
M. Kayal, D. Stefanovic M. Pastre
Analog structures library
• single transistor
• current mirror
• cascode current mirror
• differential pair
• cascode stage
• folded cascode stage
CMOS ANALOG DESIGN EDUCATIONAL TOOL
M. Kayal, D. Stefanovic M. Pastre
general params
• small signal params
• DC biasing values
• parasitic capas
• transition frequency
specific params
• maximum DC offset
• current mismatch
• gain
Procedural Design of Complex Structures
Circuit
Partitioning
CMOS ANALOG DESIGN EDUCATIONAL TOOL
M. Kayal, D. Stefanovic M. Pastre
Chart-Oriented
Basic Analog
Structures
Sizing
Circuit Level
Performances
PAD Input
CMOS ANALOG DESIGN EDUCATIONAL TOOL
M. Kayal, D. Stefanovic M. Pastre
Circuit Partitioning
p current mirror
cascode
current
mirror
bias3
Ibias
folded cascode pair
Ibias
n current mirror
CMOS ANALOG DESIGN EDUCATIONAL TOOL
M. Kayal, D. Stefanovic M. Pastre
bias4
PAD Design Flow
Sizing of basic analog structures :
SR,
CMR+,
CMRR,
PSRR+
Iocurrent
_ calc =mirror
SR ⋅ C L
p
Ibiasg m _ calc = 2π ⋅ f _ GBW ⋅ C L
Ibias
CMR-,
PSRR-,
noise,
stability
CMOS ANALOG DESIGN EDUCATIONAL TOOL
M. Kayal, D. Stefanovic M. Pastre
gain, noise, offset,
stability,
output swing
cascode
current
mirror
folded cascode pair
n current mirror
GBW,
gain,
noise,
offset,
stability
Conclusion
• a new chart-based didactical analog design tool
• a new knowledge based analog design methodology
• design and re-design of wide range of circuits
• an excellent didactical tool that helps to hand
analog knowledge to non-expert designer
CMOS ANALOG DESIGN EDUCATIONAL TOOL
M. Kayal, D. Stefanovic M. Pastre